Influence of Lateral Temperature Gradients on the Failure Modes at Power Cycling

Abstract

In this article, the influence of the insulated gate bipolar transistor (IGBT) chip-near temperature gradient on the failure modes in the power cycling test is investigated with the finite element (FE) simulation and experiment. Two important aspects influencing the temperature gradient are studied: one is the load current pulse duration t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> from the testing aspect; the other is the area ratio between the chip region and direct copper bonding (DCB) top side copper determined by the device package layout. The IGBT chip-near temperature gradient caused by these two factors is first investigated using the FE thermal simulation. It was found that by varying t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> and the area ratio, a significant influence on the temperature gradient of the chip and the average temperature of the solder layer can be achieved, which could lead to different dominating failure modes under the same power cycling test conditions. Furthermore, experiments considering those two factors were designed and performed to verify the inference derived from the simulation. The results show that the failure mode indeed can be shifted because of the changed temperature gradient.