Influence of Immersion Lithography on Wafer Edge Defectivity

Abstract

In semiconductor manufacturing, the control of defects at the edge of the wafer is a key factor to keep the number of yielding die as high as possible per wafer. Using dry lithography, this control is typically done by an edge bead removal (EBR) process, which is understood well. The recent production introduction of immersion lithography however changes this situation significantly. During immersion exposure, the wafer edge is locally in contact with water from the immersion hood, and particles can then be transported back and forth from the wafer edge area to the scanner wafer stage. Material in the EBR region can also potentially be damaged by the dynamic force of the immersion hood movement. In this chapter, we have investigated the impact of immersion lithography on wafer edge defectivity. In the past, such work has been limited to the inspection of the flat top part of the wafer edge, due to the inspection challenges at the curved wafer edge and lack of a comprehensive defect inspection solution. The development of edge inspection & metrology tools now allows us to probe this area of the wafer. This study used KLA-Tencor's VisEdge CV300-R, an automated edge inspection system that provides full wafer edge inspection (top, side, and bottom) using laser-illumination and multi-sensor detection, and where defects can be classified with Automated Defect Classification (ADC) software. In addition to defectivity capture, the tool performs simultaneous, multi-layer, film edge and EBR metrology, indicating the distance from the wafer edge or wafer top depending on the location of the film/EBR edge. It also can review defects using an integrated, hi-resolution microscope. In this paper the impact from immersion lithography towards wafer edge defectivity is investigated. The work revealed several key factors related to wafer edge related defectivity control: choice of resist, optimization of EBR recipes, scanner and immersion-fluid contamination, wafer handling and device processing procedures. Understanding the mechanisms of wafer edge related immersion defects is believed to be critical to the successful integration of the immersion process into semiconductor manufacturing.