Abstract
Potential-induced degradation (PID) was recently identified as one of the most important degradation mechanisms. It can be due to many different reasons during the manufacture and application of solar energy system. In this study, the effect of defect density of silicon wafers on the PID phenomenon is revealed by PID simulation tests at both the cell and module levels. Silicon wafers of the same and different crystal structures with various defect densities are studied, respectively. The results, which are coincident, showed that the extent of PID has a positive correlation with defect density. The increased defect density can lead to a drastic decline in Rsh, finally promoting the PID phenomenon. Silicon wafers with the lowest defect density demonstrate the least current leakage and highest PID resistance after PID simulation tests. Therefore, the result of this study shows the correlation between the PID strength of solar cells and defect density of silicon wafers, which can be easily measured during wafer manufacture.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.