Industry Drop Tests in Solder Joint Reliability Study of Molded Flip Chip Package

Abstract

In this paper, the author has compared the package performance of molded flip chip package in two types of industry drop test conditions namely test J and N. Drop dynamic analysis, failure mechanism and board design options were discussed in detail. High speed camera (HSC) and strain measurement analyses were used in this study. It was found that the molded package has a shorter life span when tested using drop test J as compared to drop test N; even though test N has a higher shock pulse than test J. From HSC data and strain measurement, higher board deflection and board strain were observed in test J condition. This suggested that strain metric is the key factor to determine the solder joint reliability and not the shock pulse. Further analysis with failure analysis (FA) revealed that the major failure mode at solder joint package interface is mechanical fatigue crack while at the board side is dominated by brittle fracture crack and broken board trace. Broken board trace failure was identified as the key factor which attributed to lower drop performance. Dependency of drop performance to different board pad designs such as via-off-pad (VoP) and via-in-pad (ViP) were considered. The experiment was also complemented with detail finite element analysis (FEA) to establish design sensitivity in molded flip chip package; such as recommendation of a better board trace routing design. In summary, the study found that drop test J is more stringent than drop test N and optimizing the board trace design can improve the solder joint reliability (SJR).