Abstract

A 0.18 µm CMOS low noise amplifier (LNA) by utilizing noise-canceling technique was designed and implemented in this paper. Current-reuse and self-bias techniques were used in the first stage to achieve input matching and reduce power consumption. The core size of the proposed CMOS LNA circuit without inductor was only 128 µm × 226 µm. The measured power gain and noise figure of the proposed LNA were 20.6 and 1.9 dB, respectively. The 3-dB bandwidth covers frequency from 0.1 to 1.2 GHz. When the chip was operated at a supply voltage of 1.8 V, it consumed 25.69 mW. The high performance of the proposed LNA makes it suitable for multi-standard low-cost receiver front-ends within the above frequency range.

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