Inductor-less 10Gb/s CMOS Transimpedance Amplifier Using Source-follower Regulated Cascode and Double Three-order Active Feedback

Abstract

In this work, a 10Gb/s CMOS transimpedance amplifier using the source-follower regulated cascode and double active feedback schemes is developed based on the TSMC 0.18/spl mu/m CMOS technology. The proposed transimpedance amplifier includes a transimpedance stage, gain stage, and open-drain output buffer. By using the source-follower regulated cascode structure, the proposed transimpedance stage not only compensates input capacitances of the photodiode and input bonding pad but also avoids from the headroom effect. Additionally, the gain stage employs the double three-order active feedback to provide a high-speed and large driving-capability buffer between the transimpedance stage and the open-drain output buffer. At a supply voltage of 1.8V, the proposed transimpedance amplifier has a bandwidth about 7. 7 GHz with a total transimpedance gain of 1.12k/spl Omega/, the group delay about /spl plusmn/ 25ps, the average input-referred noise current of 20/spl mu/A//spl radic/Hz, and the maximum allowed input capacitance of 300fF. The core size of the proposed transimpedance amplifier is 300/spl mu/m /spl times/ 100/spl mu/m. As compared to the conventional ones, the proposed transimpeadance amplifier can have a larger input capacitance and lower hardware cost at a similar receiving performance for 10GB/s optical data communication.