Individual Interface Traps and Telegraph Noise

Abstract

The immense progress in silicon technology and miniaturization of electronic devices to sub-micrometer sizes has led to almost defect-free metal oxide semiconductor field effect transistors (MOSFETs). The centerpiece of microelectronics technology, the Si — SiO2 interface, is today fabricated with an interface trap density Dit = 108 − 1010 cm-2eV-1, so that a standard MOSFET with sub-μm gate dimensions contains less than 1–100 defects in its active area. A schematic of an n-channel MOSFET is depicted in Figure 5.1(a). The carrier densities induced in the channel by the variable gate bias voltage range from ns = 109 cm-2 in the sub-threshold bias region up to ns = 1012 cm-2 for high gate bias voltages. The number of charge carriers in the channel of a micrometer-sized MOSFET therefore ranges from about 10 in the sub-threshold region up to more than 10000 electrons in strong inversion. Capture of a single electron into an interface trap causes a noticeable 0.01% to 10% change in the number of mobile charge carriers in the channel and thus in its conductance. Conductance changes of the channel may be even larger, because the mobility is also affected by the trapping or emission of a charge carrier due to the creation or annihilation of a scattering center. Trapping and re-emission of single electrons from and to the channel by interface traps cause a random switching of the source-drain conductance between two discrete states, as schematically sketched out in Figure 5.1(b).KeywordsCarrier DensityDeep Level Transient SpectroscopyGate BiasCoulomb EnergyInterface TrapThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.