Abstract
Indium solderbumps are usually used in interconnection between focal plane arrays (FPAs) and Si read out integrated circuits (ROICs) by flip-chip bonding. The fabrication of indium bump array is a critical technology in this process. In this paper, the 16×16 indium bump array was fabricated by electroplating method. The indium bump is 100μm in pitch and 40μm in diameter. Lift-off method and IBE process were adopted to try to remove the seed layer. Ti/Pt/Au(200 A/300 A/800A) by sputtering method and Ti/Pt/Au/ep Au(200 A/300 A/800A/3–4μm) by electroplating after sputtering were investigated as UBM (under bump metallization) of indium bump. The reliability of indium bumps with different UBM was evaluated by cross-section analysis and shear test.
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