Abstract
We present a novel data programming scheme for flash memory. In each word-line, exactly $k$ out of $n$ memory cells are programmed while the rest are kept in the erased state. Information is then conveyed by the index set of the $k$ programmed cells, of which there are $\binom {n}{k}$ possible choices (also called activation patterns). In the case of multi-level flash, additional information is conveyed by the threshold-voltage levels of the $k$ programmed cells (similar to traditional programming). We derive the storage efficiency of the new scheme as a function of the fraction of programmed cells and determine the fraction that maximizes it. Then, we analyze the effect of this scheme on cell-to-cell interference and derive the conditions that ensure its reduction compared with the traditional programming. Following this, we analyze the performance of our new scheme using two detection methods: fixed reference detection and dynamic reference detection, and conclude that using dynamic reference detection will result in page error performance improvements that can reach orders of magnitude compared with that attainable by the fixed reference approach. We then discuss how logical pages can be constructed in the index programming similarly to traditional programming. Finally, we discuss the results and tradeoffs between storage efficiency and error resilience proposed by the scheme along with some future directions.
Highlights
O VER the last two decades, flash memory has become a major pillar of non-volatile storage
These bit-cost reduction techniques include the shrinking of cell size and the use of triple and multiple-level cell (TLC, multiple level cells (MLC)) technologies to allow more bits to be stored in the same cell as opposed to the original single level cell (SLC) technology where only a single bit was stored in each cell [1]
Our proposed scheme exploits the asymmetry of errors in flash memory; intuitively, since the majority of errors correspond to cells in a programmed state shifting into another programmed state, it is less likely that the activation pattern changes, resulting in an enhanced robustness
Summary
O VER the last two decades, flash memory has become a major pillar of non-volatile storage. Our proposed scheme exploits the asymmetry of errors in flash memory; intuitively, since the majority of errors correspond to cells in a programmed state shifting into another programmed state (i.e., non-erased), it is less likely that the activation pattern changes, resulting in an enhanced robustness. We refer to this method as index programming (IP), inspired by the recent works on spatial modulation techniques for wireless systems [22] where additional information is transmitted by the set of activate transmit antennas.
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