Incorporation of metal silicides and refractory metals in VLSI technology

Abstract

The advantages and issues associated with the incorporation of metal silicides and the selective deposition of refractory metals into VLSI device technology are illustrated using examples from 1 to 0.25 μm CMOS technology where the silicide or metal are formed over a pre-existing junction. While the drive current characteristics, latch-up resistance, and series resistance of junction-clad devices ae generally improved, other characteristics, such as hot electron stability, threshold voltage control, and short channel effect may be adversely effected. Reducing the metal (silicide) thickness to reduce silicon consumption and thereby allow scaling the junction depth results in films having considerably higher resistivity and poorer thermal stability. The use of silicide as a diffusion source is shown to be one possible way to scale the technology to smaller dimensions while minimizing the scaling of the silicide thickness. Here we report low leakage (<10 nA/cm 2)n + and p + junctions where the junction motion beyond the silicide is believed to be less than 1 nm.