Including SMT ferrite beads in DC power bus and high-speed I/O line modeling

Abstract

Surface mount technology (SMT) ferrite beads are often used in high-speed digital circuit designs to mitigate noise. The common modeling approach is to include SMT ferrite beads as equivalent lumped LCR circuits. The work presented in this paper included SMT ferrite beads as a frequency-dependent impedance in a PEEC-like modeling tool denoted CEMPIE, a circuit extraction approach based on a mixed-potential integral equation formulation. Agreement with measurements demonstrates the approach. The applications shown are segmentation of power areas for noise isolation, and I/O line filtering.