Abstract

We report performance of InGaP/GaAs heterojunction bipolar transistors (HBTs) fabricated on epitaxial films directly grown onto 200 mm silicon (Si) substrates using a thin 100% germanium (Ge) buffer layer. Both buffer layer and device layers were grown epitaxially using metalorganic chemical vapor deposition (MOCVD). With the assistance of numerical simulation, we were able to achieve high performance GaAs HBTs with DC current gain of ∼100 through optimizing the base doping concentration (C-doped, ∼ 1.9×1019/cm3), base layer thickness (∼55 nm), and the sub-collector doping concentration (Te-doped, > 5×1018/cm3). The breakdown voltage at base (BVceo) of higher than 9.43 V was realized with variation of < 3% across the 200 mm wafer. These results could enable applications such as power amplifiers for mobile phone handsets and monolithic integration of HBTs with standard Si-CMOS transistors on a common Si platform.

Highlights

  • The future integrated circuit will likely include the monolithic integration of silicon complementary metal oxide semiconductor (Si-CMOS) transistor with the high performance III-V materials for additional RF and/or opto-electronic applications.[1]

  • In0.49Ga0.51P/Gallium arsenide (GaAs) heterojunction bipolar transistors (HBTs) is studied because the lattice constant of GaAs is more closely matched to Si (∼4%) substrate which introduces lesser misfit and threading dislocations compare to In0.3Ga0.7As, or InP- based HBTs (∼6% to 8% lattice mismatch to Si substrate)

  • We report the InGaP/GaAs HBT demonstrated on epitaxial films grown directly on a thin Ge layer (800 nm, 100%, buffer-less) on a Si substrate and DC performance of the HBT

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Summary

INTRODUCTION

The future integrated circuit will likely include the monolithic integration of silicon complementary metal oxide semiconductor (Si-CMOS) transistor with the high performance III-V materials for additional RF and/or opto-electronic applications.[1]. In0.49Ga0.51P/GaAs HBT is studied because the lattice constant of GaAs is more closely matched to Si (∼4%) substrate which introduces lesser misfit and threading dislocations compare to In0.3Ga0.7As-, or InP- based HBTs (∼6% to 8% lattice mismatch to Si substrate). One approach is using germanium-on-insulator (GOI) substrate,[11] which is fabricated from Ge donor wafer With this approach, HBTs with DC current gain of ∼120-140 can be achieved, due to the low defect level (∼105/cm[2]). The other approach is utilizing a thick compositional graded SixGe1-x buffer layer (∼10 μm) to accommodate the lattice mismatch between the GaAs/Ge layer and the Si substrate Using this approach, AlGaAs/GaAs and InGaP/GaAs HBTs with DC current gain of about 100 and 25, respectively, were demonstrated.[12,13]. We focused on the study of the effect of the base doping concentrations, base layer thickness and sub-collector doping concentration on the HBT performances, with assistant of numerical simulation

MATERIAL GROWTH AND DEVICE FABRICATION
NUMERICAL SIMULATION
EXPERIMENTAL RESULT AND DISCUSSION
CONCLUSION
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