In-Line Phase and Texture Control in Microelectronics Industry

Abstract

We present the principles of operation and a summary of results from in-fab automated X-ray diffraction (XRD) metrology in support of copper damascene roduction. The automated XRD tools (an example is shown in Figure 1) are capable of rapid mapping of 300 mm wafers (with a throughput rate of 40 wafers/hour) of quantitative information about the film crystallographic composition, texture and thickness with a spatial resolution down to 30 microns. Microstructure control plays an increasingly important role in improving the performance and reliability of ULSI devices that use the damascene copper technology at 130 nm node and below. The problems related to delamination, stress voiding, and electromigration failures could be mitigated by the selection of proper materials, processing methods, and manufacturing tools. The optimum process would result in a tailored microstructure of barrier/seed/electroplated copper aggregate. At the same time, the microstructure could be used as an internal sensor, sensitive to process excursions and providing guidance for corrective actions. The texture and crystallographic phase data can be used as a direct measure of the deposition process in terms of film quality, reproducibility, and stability over time. The spatial distribution of crystallographic texture and phase can be measured on a single wafer in order to check wafer uniformity. More importantly, the same measurements can be carried out at predetermined intervals on wafers from a single deposition tool, and the results used to create a database that can be applied to trend charting and tool qualification. Examples of microstructure control in damascene copper processing include: process development and qualification, process control and stability, process excursion and post maintenance stability, deposition tool qualification, and on-line R&D. The examples of texture control will refer to materials and processes typical of damascene copper technology for ULSI. A typical processing route includes the PVD deposition of a barrier layer and copper seed layer, followed by copper electroplate, anneal and chemical- mechanical planarization. All the processing steps affect the texture of annealed copper, and therefore affect directly the performance of interconnects. We will also present examples of application to processing of metal gates (NiSi films) and ferroelectric non-volatile memory (PZT films).