Abstract
The drift voltage required for operating ion mobility spectrometers implies high voltage isolation of either the ion source or the detector. Typically, the detector is grounded due to the sensitivity of the small ion currents to interferences and thus higher requirements for signal integrity than the ion source. However, for certain ion sources, such as non-radioactive electron emitters or electrospray ionization sources, or for coupling with other instruments, such as gas or liquid chromatographs, a grounded ion source is beneficial. In this paper, we present an isolated data acquisition interface using a 16 bit, 250 kilosamples per second analog to digital converter and fiber optic transmitters and receivers. All spectra recorded via this new data acquisition interface and with a grounded ion source show the same peak shapes and noise when compared with a grounded detector, allowing additional freedom in design.
Highlights
Ion mobility spectrometers (IMS) separate and characterize ions based on their motion under the influence of an electric field
The detector is at ground potential and the ion source is at high potential, as shown in Fig. 1, to avoid isolating the sensitive ion current signal
The design requires two serial peripheral interface (SPI) interfaces implemented at the microcontroller or field programmable gate array (FPGA) on the data acquisition board, one as a master for generating the signal (Conv) and the clock (SCLK) signal and one as a slave for receiving the data synchronized to the delayed SCLK
Summary
Ion mobility spectrometers (IMS) separate and characterize ions based on their motion under the influence of an electric field. In order to build an isolated data acquisition interface for IMS with a grounded ion source and floating detector as shown, all these signals need to be isolated for example using an isolation chip or a fiber optics transmitter / receiver pair. Fiber optics transmitters are shown in grey and receivers in black In this case, the design requires two SPI interfaces implemented at the microcontroller or FPGA on the data acquisition board, one as a master for generating the SCLK signal and one as a slave for receiving the data synchronized to the delayed SCLK. If the microcontroller just sends the SCLK signal and no additional data to the ADC, it would be possible to use a simple timer to generate a 50% duty cycle signal with the desired frequency In this case, only a single SPI interface is required. We can directly compare the performance of both configurations
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