Abstract
ABSTRACTOptimization of the interface between the organic semiconductor (OSC) & the source-drain (S/D) electrode is critical in order to improve organic thin film transistor (OTFT) device performance. This process typically involves coating the metal S/D electrodes with an optimal self-assembled thiol layer; a process that requires pristine metal surfaces for successful treatment. Obtaining contamination free surfaces can be challenging in the case of printed metal electrodes. Here we demonstrate an effective strategy to address this issue by introducing a brief low power forming gas plasma treatment prior to the surface coating step. We show a two orders of magnitude decrease in the contact resistance as a result of this treatment.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
