Improving Speed of MUX-FSM-based Stochastic Computing for On-device Neural Networks

Abstract

We propose an acceleration technique for processing multiplication operations using stochastic computing (SC) in on-device neural networks. Recently, multiplexor driven finite state machine (MUX-FSM)-based SCs, which employ a MUX controlled by an FSM to generate a (repeated but short) bit sequence of a binary number to count up for a multiplication operation, considerably reduce the processing time of MAC operations over the traditional stochastic number generator (SNG) based SC. Nevertheless, the existing MUX-FSM-based SCs still do not meet the multiplication processing time required for the wide adoption of on-device neural networks in practice even though it offers a very economical hardware implementation. In this respect, this work proposes a solution that speeds up the conventional MUX-FSM-based SCs. Precisely, we analyze the bit counting pattern produced by MUX-FSM and replace the counting redundancy by shift operation, resulting in a shortening of the length of the required bit sequence significantly, together with analytically formulating the number of computation cycles. Through experiments, we have shown that the enhanced SC technique can reduce the processing time by 44.1% on average over the conventional MUX-FSM-based SCs.