Improving security against cache memory attacks for dual field multiplier design based on elliptic curve cryptography

Abstract

The elliptic curve cryptographic (ECC) technique is employed for various security standards like security key management, digital signature and data authentication. The ECC technique is capable of undertaking sequential and equivalent mode processes through the unified design that is used equally for binary field and in the leading area of cryptosystems. Furthermore, a progressive transposition method and control information route are combined with the ECC mainframe, which offers efficient throughput, and adaptive calculation with low power. The dual-field Montgomery multiplier-carry save adder (DMM-CSA) structure is designed for the ECC system. The DMM structure has been developed using CSA in this method. The adder requires more number of Full Adders for the circuit design, which has occupied more area. To overcome this problem, this work introduces the dual field Vedic multiplier-look up table carry select adder (DVM-LCSLA) which is used to increase the performance of the ECC scheme for 256 bit. The first aim of the methods mentioned above is to develop a high-performance modular inversion for the ECC technique by employing application specified integrated chip and field programmable gate array (FPGA) implementation with the help of Verilog code. FPGA results indicate the analysis of power utilization, time delay information and Hardware area overhead in DVM-LCSLA used in ECC system compared to the state-of-art methods.