Improving Reliability of SRAM-Based FPGAs by Inserting Redundant Routing

Abstract

This work proposes a new fault-tolerant method able to deal with open and shortcut circuit faults in SRAM-based FPGA routing connections. The bitflips provoked by upsets in the routing control memory cells are the major concern in SRAM-based FPGAs, since these memory cells represent the majority of the bits in the configuration bitstream. Even in an application hardened by triple modular redundancy (TMR), upsets in the routing bits still represent a major problem, due to the possibilities of short and open circuits that can happen in more than one redundant block of the TMR The idea presented in this paper is to create local redundancy in the routing, so that whenever the critical connection fails, the redundant one ensures a working connection by propagating the correct value. The proposed method is based on duplication of the internal critical connections. A detailed classification and test of each case solution is explained in this paper. Preliminary results show the efficiency of this method to reduce error due routing upsets.