Improving Performance of Tin-Doped-Zinc-Oxide Thin-Film Transistors by Optimizing Channel Structure

Zhuofa Chen,Xing Zhang,Yi Wang,Dedong Han

doi:10.1038/s41598-019-53766-2

Zhuofa Chen, Xing Zhang + Show 2 more

Open Access

https://doi.org/10.1038/s41598-019-53766-2

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Abstract

In this paper, we investigated the performance of thin-film transistors (TFTs) with different channel configurations including single-active-layer (SAL) Sn-Zn-O (TZO), dual-active-layers (DAL) In-Sn-O (ITO)/TZO, and triple-active-layers (TAL) TZO/ITO/TZO. The TAL TFTs were found to combine the advantages of SAL TFTs (a low off-state current) and DAL TFTs (a high mobility and a low threshold voltage). The proposed TAL TFTs exhibit superior electrical performance, e.g. a high on-off state current ratio of 2 × 108, a low threshold voltage of 0.63 V, a high field effect mobility of 128.6 cm2/Vs, and a low off-state current of 3.3 pA. The surface morphology and characteristics of the ITO and TZO films were investigated and the TZO film was found to be C-axis-aligned crystalline (CAAC). A simplified resistance model was deduced to explain the channel resistance of the proposed TFTs. At last, TAL TFTs with different channel lengths were also discussed to show the stability and the uniformity of our fabrication process. Owing to its low-processing temperature, superior electrical performance, and low cost, TFTs with the proposed TAL channel configuration are highly promising for flexible displays where the polymeric substrates are heat-sensitive and a low processing temperature is desirable.

Highlights

thin-film transistors (TFTs) fabricated by solution processing and inkjet printing have the advantage of low cost, while suffering from a low mobility and a high annealing temperature[8,9]
We compared the performance of TFTs with different channel structures and demonstrated that high-performance to be investigated. Sn-doped ZnO (TZO) TFTs can be realized at a low temperature (80 °C) by adopting TAL stack for TFTs
We compared the electrical properties of TFTs with three different channel configurations including SAL, DAL, and TAL

Summary

Introduction

TFTs fabricated by solution processing and inkjet printing have the advantage of low cost, while suffering from a low mobility and a high annealing temperature[8,9]. The idea of adopting multi-stacked active-layer structures to improve the performance of TFTs has been previously investigated[26,27,28,29,30]. Multi-stacked channel structures were adopted in solution processed TFTs to improve the mobility of devices[26,27]. A systematic work to probe the performance of TZO TFTs with multi-stacked active-layer structure at a low processing temperature is still lacking. We compared the performance of TFTs with different channel structures and demonstrated that high-performance TZO TFTs can be realized at a low temperature (80 °C) by adopting TAL stack for TFTs. Compared to TFTs with SAL or DAL channel configuration, the proposed TAL TZO/ITO/TZO TFTs exhibit a higher mobility and a lower threshold voltage. The proposed TAL TFTs are promising in various applications due to the superior performance, low-processing temperature, and low cost

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