Improving Low-Frequency Noise in 14-nm FinFET by Optimized High-k/Metal Gate Thermal Processing

Abstract

Low-frequency noise has become one of the critical factors in ultra-scaled MOSFET devices, and is also effective as an evaluating tool in characterizing device structure and reliability. Here, the low-frequency noise in 14 nm-FinFET is studied, and its dependence on trap defects of high-k dielectric and interface is further experimentally investigated. By using NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> thermal processing in high-k/metal gate (HKMG) module, the 1/f noise characteristics have been greatly improved. The dominating mechanism is quantitatively analyzed focusing on the defect trap density in bulk HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface based on the carrier number fluctuation model. Moreover, the carrier mobility and the bias temperature instability property of the FinFET devices are also enhanced which further confirms the improvement in low-frequency noise upon optimized thermal processing.