Improving Linearity of CMOS Variable-gain Amplifier Using Third-order Intermodulation Cancellation Mechanism and Intermodulation Distortion Sinking Techniques

Abstract

This paper presents an improved linearity variable-gain amplifier (VGA) in 0.18-µm CMOS technology. The lineari­ty improvement is resulted from employing a new combinational technique, which utilizes third-order-intermodulation (IM3) cancellation mechanism using second-order-intermodul­ation (­IM2) injection, and intermodulation distortion (IMD) sinking techniques. The proposed VGA gain cell consists of a variable-gain attenuator followed by a differential cascode amplifier as a fixed-gain stage. The continuous gain control mechanism in the first stage occurs by varying the gate voltage of an nMOS transistor. Our proposed linearization technique is applied to the fixed gain cascode amplifier of the second stage. To examine the linearity of the proposed circuit, a nonlinear analysis of the cascode amplifier based on Taylor series has been performed. The simulation results show that after linearization, the third-order input intercept point (IIP3) of the whole VGA has been improved about +18 dB at the gain of 15.4 dB. The VGA has a voltage gain varying from -7.5 to 19.5 dB and a bandwidth of 830 MHz to 845 MHz. Morever, the circuit dissipates 4.65 mW to 9.35 mW from a 1.8 V single supply over the entire gain range.