Abstract
The shift of the threshold voltage distribution in 3D (three dimensional) NAND flash memory can lead to the overlapping of adjacent states, and subsequently read error. By merely adopting the default value provided by the manufacturer, the read offset in the controller could not keep low raw bit error rate (RBER) in the retention process. In this paper, we have developed a read offset model based on the dimensions of word-line (WL) and the shift of retention variations. Through mining the offline data, this new model can adjust to a more suitable read offset during retention variations. We have further proposed three different kinds of read voltage management strategies. Our experiment results show that this new model can optimize the read offset value and reduce the RBER effectively compared to the default setting provided by the manufacturer, and thus improve the reliability and performance of flash memory.
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