Abstract
This paper aims at improving the Enhanced-PLL (E-PLL) to mitigate the transient low-frequency oscillations, which is inherent to single-phase circuits. These improvements resulted in a new PLL configuration, designated here as the Double-Frequency Mitigation SOGI-EPLL, or simply DFM-SOGiEPLL. We integrate the EPLL with a Second-Order Generalized Integrator (SOGI), by modifying the computation of the internal error signals of the phase-and-frequency loop and the amplitude loop. Thus, the proposed DFM-SOGiEPLL is able to extinguish transient low-frequency oscillations, in a short time period, in comparison to the conventional EPLL. A dynamic model approach of both EPLLs, including four different test-cases, was implemented through numerical simulations and hardware experiments to verify the better performance of the proposed one.
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