Improvement of the vector analyser based on two-phase switching mode synchronous detection

Abstract

This paper describes a frequency response vector analyser, which is realised via a combination of analog and digital signal processing circuits, and is built-up as a full-size PC card. Attention is mainly focussed on the following problems: identification of the vector measurement errors caused by the harmonic sensitivity of switching type synchronous detectors (SD); avoidance of these errors using reasonable approximations for the time variation of the SD gain and of the excitation signal; the analysis and avoidance of measurement errors, which are caused by the phase locked loop (PLL) based synthesisers of signals that drive the SD and the excitation source. Special attention is paid to the phase modulation caused by the ripple of the phase detector PD output signal in the PLL, and on suppressing this parasitic effect using a sample-and-hold (S&H) circuit.