Abstract

In this study, we investigated resist pattern collapse during the resist development process. We evaluated the effect of a simple improvement such as rinse-liquid sequencing and rinsing using surfactants. First, we controlled the wafer spinning speed during the rinse-liquid flow step to reduce liquid flow shock. Using this approach, we obtained a 110-nm L/S (line and space) structure with no pattern collapse. However, this technique has only a small effect on preventing pattern collapse with sub-100-nm devices. By using a rinse process with a surfactant, we could control pattern collapse with 100-nm L/S or smaller patterns. Finally, we have succeeded in controlling pattern collapse of 70-nm L/S patterns (aspects ratio of 4.6) using a surfactant during the rinse process. These two simple methods are a significant improvement over conventional rinse processes. These process improvements are available for 90-nm (and smaller) design rules and are applicable for a single layer resists.

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