Abstract

Test vector compression is an emerging trend in the field of VLSI testing. According to these trends, increasing test data volume is one of the biggest challenges in the testing industry. The overall throughput of automatic test equipment (ATE) is sensitive to the download time of test data. An effective approach to the reduction of the download time is to compress test data before the download. But this tester has limited speed, memory and I/O channels. The test data bandwidth between the tester and the chip is small which is the bottleneck in determining how fast the testing process. To overcome these limitations of the Automatic Test Equipment (ATE), a new hybrid test vector compression technique is proposed. the large volume of test data input is compressed in a hybrid fashion before being downloaded into the processor and the test compression ratio is increased and is experimentally verified with the benchmark circuits.

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