Abstract
In this letter, we investigate row hammering (RH) in recessed channel access transistor (RCAT)-DRAM cells. A novel technique is proposed to minimize the row hammer fail in DRAM cells by selective/local introduction of metal nanoparticles (MNPs) at the gate metal–oxide interface. Using TCAD simulations, we show that the introduction of MNPs with an optimized work function (WF) significantly reduces the storage node leakage of unaccessed DRAM cells (victim cells) due to the hammered access of neighboring DRAM cells (aggressor cells) sharing a common bit line. The proposed technique potentially eliminates row hammer fail in RCAT-DRAM cells at 2X and 1X nodes. The improvement in row hammer fail is due to the dual-energy valley induced between the neighboring DRAM cells by the introduction of MNPs. These valleys prevent diffusion of electrons from the aggressor cell to the victim cell, which improves row hammer fail. This letter shows that the introduction of MNPs is a promising technique to eliminate row hammer fail in DRAM cells.
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