Improvement of metal–ferroelectric–silicon structures without buffer layers between Si and ferroelectric films

Abstract

Si-based metal–ferroelectric–semiconductor (MFS) structures without buffer layers between Si and ferroelectric films have been developed by depositing SrBi2Ta2O9 (SBT) directly on n-type (100)-oriented Si. Some effective processes are adopted to improve the electrical properties of these MFS structures. Contrary to the conventional MFS structures with top electrodes directly on ferroelectrics, our MFS structures have been developed with thin dense SiO2 films deposited between ferroelectric films and top electrodes. Due to the SiO2 films, the leakage current densities of MFS structures are reduced to 2×10-8 A/cm2 under the bias of 5 V. The C-V electrical properties of the MFS structures are greatly improved after annealing at 400 °C in N2 ambient for 1 h. The C-V memory windows are increased to 3 V, which probably results from the decrease of the interface trap density at the Si/SBT interface.