Improvement of drop shock and TC reliability for large die Wafer Level Packages in mobile application

Abstract

In this study, board level drop shock and TC reliabilities in terms of solder materials and UBM(Under Bump Metallurgy) structures have been evaluated to suggest optimal structures of WLP(Wafer level Packaging) with the large die, high pin counts for mobile application. Test vehicles of WLP have been designed with 5.6×5.6mm die size, 340 um thickness (including backside protection film), 14×14 ball array, 400 um ball pitch. Firstly, effect of solder ball composition has been investigated through BLR(Board Level Reliability) tests using electroplated Cu UBM with which solder compositions are SAC305, SAC125-0.05Ni, SAC105, Sn0.7Cu respectively. Secondly, effect of UBM structure has been confirmed under SAC305 ball composition, with which UBM structures are Cu UBM, Ni base-UBM, and direct ball attaching without UBM. Additionally, effect of dielectric materials and thickness for the reliability has been investigated. For the condition of BLR tests, drop tests have been performed under JEDEC Condition B (1500G, 0.5millisecond duration, half-sin pulse), as listed JESD22-B110. Resistance variation was observed by in-situ electrical monitoring during drop test. In case of TC test, the condition was −45~125 D, 2cph (cycles per hour), and resistances of daisy chain were measured every 100cycles. Lifetime statistics for WLP with each design and factors have been compared through the Weibull plot for cumulative failure rate after TC and drop shock tests, respectively. Also, the observation of fracture mode through cross-section analysis and FEM simulation for the thermo-mechanical fatigue has been conducted to define the failure mechanism for each reliability test.