Improvement in Characteristics of Thin Film Transistors upon High-Pressure Steam Annealing

Abstract

Low-temperature (350 °C) and high-pressure (1 MPa) steam annealing is effective for improving the characteristics of low-temperature-processed polycrystalline silicon thin film transistors (LTPS-TFTs) and their uniformity. We developed high-pressure annealing systems for 600×720 and 400×500 mm2 glass substrates, and investigated the annealing effects on the electrical properties of n-channel TFTs. The TFTs fabricated without high-pressure annealing have a low saturation mobility caused by the large amount of fixed oxide charge in SiO2, and a high threshold voltage (Vth) caused by the high trap density at the SiO2/Si interface. High-pressure steam annealing effectively reduces the amount of fixed oxide charge and the number of interface traps, resulting in the improvement of TFT properties. The crystal orientation of poly-Si strongly affects the interface trap density, which causes the nonuniformity of the TFT characteristics. High-pressure annealing also decreases the deviation of the trap density caused by the crystal orientation, and uniform electrical properties are achieved.