Improved upper contacts PMMA on P3HT PTFTS using photolithographic processes

Abstract

In this work we present a new polymeric thin film transistor (PTFT), fabrication process where standard photolithographic and dry etching techniques are used to place gate contact on the upper surface of the device, and to access in an easy and reliable way the buried bottom drain and source contacts from the upper surface of the device. This fabrication technique benefits of all the advantages that photolithographic processes report, as device isolation, patterning of small dimensions and possibility of device integration on both rigid and flexible substrates. We also show that, since PMMA is placed as the outermost polymeric layer, it serves both as dielectric and as protective layer, allowing devices to work in ambient conditions with significantly less degradation than other PTFTs structures previously reported. Electrical characterization of the devices showed that this technological approach provides mobility values an order of magnitude higher than those previously reported by us, using the same polymeric layers, but with buried drain and source contacts.