Abstract
This brief presents an improved sorting architecture for ${K}$ -best multiple-input multiple-output (MIMO) detection. In the proposed architecture, two properties of the ${K}$ -best MIMO detection are exploited for simplifications: the order among siblings from the same parent node can be easily identified; the order among the ${K}$ -best nodes is dispensable. Besides, the generalized mergesort-based architecture for the ${K}$ -best sorting is presented so that the proposed sorter can be constructed for any power-of-two ${K}$ and modulation scheme. Compared to the conventional ones, the proposed architecture lowers not only the hardware complexity but also the latency significantly.
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More From: IEEE Transactions on Circuits and Systems II: Express Briefs
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