Improved QCA-Based Full Adder/Subtractor Structures

Abstract

Recently, Quantum-dot Cellular Automata (QCA) technology has shown great potential over current CMOS technology as it offers energy and area- efficient digital nano-scale circuits. In this article, various full adder/subtractor QCA implementations are presented and compared with recently published designs. The proposed designs include dedicated full adder and subtractor structures, combined full adder/subtractor structure and single- layer and multi-layer-controlled adder/subtractor structures. The proposed designs are simulated and evaluated using specialized QCA design tools. It was found that the proposed dedicated full adder and subtractor structures outperform their recently presented counterparts in terms of cell count, area, latency and cost values. In addition, the combined structure has achieved significant improvements as compared with existing designs. The improvements in cell count, area, latency and cost values have reached up to 82, 86, 66 and 98%, respectively. As compared with the best recent single-layer and multi-layer designs, the proposed single-layer controlled full adder/subtractor structure has achieved up to 46, 55 and 55% improvement in QCA cell count, area and cost value, respectively. On the other hand, the achieved improvement of the proposed multi-layer-based structure has reached up to 29, 43 and 15% in cell count, area and cost value, respectively. Furthermore, it has been observed that the proposed combined/controlled structures are more energy-efficient than the dedicated designs which aligns with the nanoscale circuit design requirements. Finally, the proposed QCA-based structures can be viewed as key building blocks for implementing larger logic designs such as Arithmetic and Logic Units (ALUs).