Improved Perturbation Vector Generation Method for Accurate SRAM Yield Estimation

Abstract

Accurate yield estimation under parametric variation is one of the most integral parts for robust and nonwasted circuit design. In particular, due to the significant impact of disparity on the high-replication circuit, precise yield estimation is essential in SRAM design. In this paper, we propose an enhanced perturbation vector generation method to improve the accuracy of the yield estimation of the conventional direct SRAM yield computation method, which are access disturb margin (ADM) and write margin (WRM) first, by splitting the concave yield metric space, the estimation error caused by linear approximation can be significantly reduced with minor increase in simulation runtime. In addition, to compensate the inaccuracy of the conventional perturbation vector, a calibration method to reflect the multi-dc condition in SRAM assist operations is also proposed. Numerical results show that 37% improved estimation accuracy and 29% reduced estimation error can be achieved compared to the conventional ADM/WRM in the wide voltage range.