Improved Monolayer MoS Performance With Two-Step Atomic Layer Deposited High- Dielectrics

Abstract

Gate dielectric engineering is crucial to enable two-dimensional (2D) transition metal dichalcogenides (TMDs) for logic transistor applications. In this work, we demonstrate a uniform and pinhole-free bilayer high-K fabricated on monolayer (1L) molybdenum disulfide (MoS2) through thermal atomic layer deposition (ALD) without surface pretreatment. A thin low-temperature (75∘C) AlOx film deposited directly on 1L-MoS2 mitigates 2D channel damage and serves as a nucleation and protection layer for high-temperature (250∘aC) HfOx high-K layer. The 1L-MoS2 back-gate (BG) devices with low-temperature ALD capping show minor mobility degradation, less threshold voltage shift, smooth surface topography, and lower device variability compared to those with high-temperature ALD capping. These electrical differences are closely related to the coverage of the AlOx film at the initial ALD stage and the resultant quality of the AlOx -MoS2 interface after HfOx deposition. The underlying mechanism of ALD on the TMDs is proposed in terms of physical analysis and electrical findings. This work provides a practical and scalable ALD approach in gate dielectrics toward high performance 2D electronics.