Improved Measurement Accuracy for Junction-to-Case Thermal Resistance of GaN HEMT Packages by Gate-to-Gate Electrical Resistance and Stacking Thermal Interface Materials

Abstract

Accurate measurements of the junction-to-case thermal resistances of power devices or module packages are necessary for validating the thermal design of the package as well as of the entire converter system. Although accurate measurements can be obtained for Si and SiC packages by the JESD51-14 standard, no standard has been established for gallium nitride (GaN) packages. A main reason for this shortcoming is the lack of accurate techniques for measuring the device's junction temperature. In this letter, a custom package of a (650 V, 150 A) eGaN high-electron mobility transistor with two gate pads was fabricated, and then its junction-to-case thermal resistance was measured by combining two techniques to improve the accuracy: using the device's gate-to-gate electrical resistance as the temperature-sensitive electrical parameter; and measuring the thermal resistance as a function of added layers of thermal interface materials. The first gives a sensitivity of 4.7 mΩ/°C and is instantaneous and immune to any transient behavior of the device. The second eliminates the need for accurate measurement of the case temperature. The package's junction-to-case thermal resistance was determined by extrapolating the discrete thermal resistance data points in the plot to zero layer of thermal interface. An analytical expression was derived to guide the extrapolation and was validated by finite-element analysis simulations. The measurement procedure was tested using two different thermal interface materials. The difference between the two experimental measurements was within 24%, and both are in good agreement with the simulated result.