Abstract
An improved low-voltage-triggered silicon-controlled rectifier is proposed for on-chip electrostatic discharge (ESD) protection in a 65-nm radio frequency CMOS. The experimental results show that it has a very low intrinsic capacitance of 18 fF at zero bias, a low and tunable trigger voltage in the range of 2.2-4.5 V, a low leakage current of 0.3 nA, and a low overshoot voltage under very fast ESD pulse. It achieves a 1.9-A failure current with only 50×9-μm2 layout area.
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