Improved ESD Protection Design for High-Frequency Applications in CMOS Technology

Abstract

An improved electrostatic discharge (ESD) protection design by using stacked diodes and silicon-controlled rectifier (SCR) as power-rail ESD clamp circuit is presented to protect the high-frequency integrated circuits in CMOS process. Experimental results show that the improved design can achieve higher ESD robustness without degrading the high-frequency performance. Based on its good performances during ESD stress and high-frequency operating conditions, the improved design is very suitable for ESD protection.