Improved electrical performance of a sol\u2013gel IGZO transistor with high-k Al2O3 gate dielectric achieved by post annealing

Esther Lee,Seung Won Lee,Jee Hoon Kim,Tae Gun Jeong,Jaeun Kim,Byungjin Cho,Ji-Hoon Ahn,Tae Hyeon Kim

doi:10.1186/s40580-019-0194-1

Abstract

We have explored the effect of post-annealing on the electrical properties of an indium gallium zinc oxide (IGZO) transistor with an Al2O3 bottom gate dielectric, formed by a sol–gel process. The post-annealed IGZO device demonstrated improved electrical performance in terms of threshold variation, on/off ratio, subthreshold swing, and mobility compared to the non-annealed reference device. Capacitance–voltage measurement confirmed that annealing can lead to enhanced capacitance properties due to reduced charge trapping. Depth profile analysis using X-ray photoelectron spectroscopy proved that percentage of both the oxygen vacancy (VO) and the hydroxyl groups (M–OH) within the IGZO/Al2O3 layers, which serve as a charge trapping source, can be substantially reduced by annealing the fabricated transistor device. Furthermore, the undesired degradation of the contact interface between source/drain electrode and the channel, which mainly concerns VO, can be largely prevented by post-annealing. Thus, the facile annealing process also improves the electrical bias stress stability. This simple post annealing approach provides a strategy for realising better performance and reliability of the solid sol–gel oxide transistor.

Highlights

Materials and process designs of transistor backplane circuits have emerged indispensable for nextgeneration display applications [1, 2]
To check the effect of post-annealing on the indium gallium zinc oxide (IGZO) transistor device, we compared the electrical characteristics of two kinds of transistor devices: the device with post-annealing versus the reference without post-annealing
4 Conclusions In this study, we analysed the effects of a post-annealing treatment on the electrical performance and stability of IGZO transistors fabricated by a sol–gel process

Summary

Introduction

Materials and process designs of transistor backplane circuits have emerged indispensable for nextgeneration display applications [1, 2]. Recent studies have thereby focused on enhancing the performance of solution-processed transistor devices by optimising the composition [13, 14], modulating the carrier transport in the oxide semiconductor [15, 16], or introducing a high-k dielectric [17]. The post-annealing step is very critical, as it can improve or, in some cases, degrade the electrical characteristics of the transistor due to a change in the chemical and physical properties of the channel, dielectric, and interface. The effects of post-annealing treatment on the electrical properties of IGZO transistors with an Al2O3 gate dielectric were investigated. Depth profile analysis by X-ray photoelectron spectroscopy (XPS) showed that atomic percentages of VO and M–OH, which degrade the transistor performance, were considerably reduced throughout the IGZO/high-k Al2O3 layers. Electrical characterisation consisted of measuring the current–voltage (I–V) and capacitance–voltage (C–V) properties using the Keithley 2636B and Keithley 4200-SCS with 4200-CVU modules, respectively

Materials and experimental methods

Results and discussion

Conclusions