Abstract

The growing demand for the integration of surface mount design (SMD) antennas into miniaturized electronic devices has imposed increasing limitations on the structure dimensions. Examples include embedded antennas in applications such as on-board devices, picosatellites, 5G communications, or implantable and wearable devices. The demands for size reduction while ensuring a satisfactory level of electrical and field performance can be managed through constrained numerical optimization. The reliability of optimization-based size reduction requires utilization of full-wave electromagnetic (EM) analysis, which entails significant computational costs. This can be alleviated by incorporating surrogate modeling techniques, adjoint sensitivities, or the employment of sparse sensitivity updates. An alternative is the incorporation of multi-fidelity simulation models, normally limited to two levels, low and high resolution. This paper proposes a novel algorithm for accelerated antenna miniaturization, featuring a continuous adjustment of the simulation model fidelity in the course of the optimization process. The model resolution is determined by factors related to violation of the design constraints as well as the convergence status of the algorithm. The algorithm utilizes the lowest-fidelity model for the early stages of the optimization process; it is gradually refined towards the highest-fidelity model upon approaching convergence, and the constraint violations improve towards the preset tolerance threshold. At the same time, a penalty function approach with adaptively adjusted coefficients is applied to enable the precise control of constraints, and to increase the achievable miniaturization rates. The presented procedure has been validated using five microstrip antennas, including three broadband, and two circularly polarized structures. The obtained results corroborate the relevance of the implemented mechanisms from the point of view of improving the average computational efficiency of the optimization process by 43% as compared to the single-fidelity adaptive penalty function approach. Furthermore, the presented methodology demonstrates a performance that is equivalent or even superior to its single-fidelity counterpart in terms of an average constraint violation of 0.01 dB (compared to 0.03 dB for the reference), and an average size reduction of 25% as compared to 25.6%.

Highlights

  • The emerging trends in integrated wireless communication technology require the integration of surface mount design (SMD) antennas with other on-chip system components

  • This paper proposes a novel procedure for accelerated miniaturization of antenna structures, incorporating variable-fidelity EM models with a continuous adjustment of the model fidelity throughout the optimization process

  • The performance figures of interest include the antenna size, the levels of constraint violations, and the CPU cost of the optimization process. The latter is expressed in (i) absolute CPU time in hours, (ii) relative cost expressed in terms of the number of equivalent high-fidelity model evaluations, and (iii) relative computational savings enabled by the proposed algorithm as compared to the benchmark algorithm

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Summary

Introduction

The emerging trends in integrated wireless communication technology require the integration of surface mount design (SMD) antennas with other on-chip system components. Several antenna size-reduction techniques involving topological alterations of the basic geometries have been proposed, including the use of corrugations in the radiator and the ground plane [3,4], the introduction of meandering slits and fractals [5], or incorporation of slots and slits [6]. Notwithstanding, as antenna topology evolves into more complex geometries due to topological modifications of the structure, manual or trial-and-error efforts fall short of identifying the optimum design. This shortcoming is more pronounced when multiple objectives need to be handled

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