Abstract

Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiNx RRAM device is realized via arsenic ion (As+) implantation. Besides, the As+-implanted SiNx RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device. The As+-implanted SiNx device further exhibits excellent performance, which shows high stability and a large 1.73 × 103 resistance window at 85 °C retention for 104 s, and a large 103 resistance window after 105 cycles of the pulsed endurance test. The current–voltage characteristics of high- and low-resistance states were both analyzed as space-charge-limited conduction mechanism. From the simulated defect distribution in the SiNx layer, a microscopic model was established, and the formation and rupture of defect-conductive paths were proposed for the resistance switching behavior. Therefore, the reason for such high device performance can be attributed to the sufficient defects created by As+ implantation that leads to low forming and operation power.

Highlights

  • The resistive random access memory (RRAM) device has high potential to be implemented for artificial intelligence (Al) and neuromorphic computing [6,7] in several kinds of emerging memories

  • A 35 nm thick SiNx was deposited via plasma-enhanced chemical vapor deposition (PECVD) under a 300 ◦ C temperature, with a NH3, SiH4 (8% in Ar), and N2 gas flow of 6, 125, and 200 sccm, respectively

  • The ion implantation doping concentration and energy can influence the number of created defects and the penetration depth of the As ions, respectively

Read more

Summary

Introduction

Christophe DetavernierIn the past few decades, resistive random access memory (RRAM) [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26] has attracted massive attention due to its simple process, high density, multilevel state, high operation speed, and low power consumption [1,2,3,4,5]. The resistance state is distributed randomly and difficult to control. Such a large resistance distribution limits the vitally important memory array circuit size [17,18]. Previous SiNx works [14,15,16], like other dielectric RRAM devices, did not exhibit good distribution for memory array application [17,18]. It is important to notice that high compliance current (Icc ) and high forming voltage will damage the dielectric layer and create unrecoverable defects, which will lead to poor retention time, decreased endurance cycles, and wide resistance distribution. Based on the discussion above, we improved the RRAM device’s integrity by implanting arsenic (As) ions into the SiNx

Methods
Results
Conclusion
Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call