Abstract
Prior to contact silicide formation, multiple Ge pre-amorphization implantation (PAI) with reverse retrograde Ge profile was investigated for sub-20-nm FinFETs. Compared with conventional single PAI, N-FinFETs from the new PAI scheme exhibit enhanced drive current by 12%, which can be attributed to decreased total series resistance ( ${\mathrm {R}}_{\mathrm {{{Total}}}}$ ) by 15% and enhanced peak electron mobility by 8%. The former arises from reduced Schottky barrier height and better crystallinity of C49/C54 TiSi2, while the latter is resulted from higher tensile strain in the channel induced by TiSi2 with more Ge incorporation. Furthermore, ring oscillator for the new PAI scheme shows better circuit performance as compared with conventional scheme in terms of 6% increase in output frequency. The newly developed PAI process is fully compatible with the incumbent ULSI technology and can be extended to sub-10-nm FinFETs.
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