Implementing modulation schemes with three switching transients in a switching period on single DSP: Application to Z-source ultra-sparse matrix converter

Abstract

Z-source networks have recently been employed with matrix converters (MCs) in order to address their limited voltage transfer ratio (VTR). In this paper, the space vector modulation of cascaded Z-source ultra-sparse matrix converter (ZSUSMC), where the Z-source network is inserted between the rectifier and inverter stages of an ultra-sparse matrix converter (USMC), is investigated. Digital implementation of the already existing space vector modulation (SVM) techniques for Z-source MCs is possible with a field programmable gate array (FPGA) employed along with a digital signal processor (DSP) due to occurrence of three switching transients in one control period. In this paper, an SVM scheme with an optimal switching pattern resulting in minimum number of changes in the switches states is developed. Furthermore, a novel approach for implementation of the developed modulation scheme on a single conventional DSP is proposed. Hardware-in-the-loop studies of the ZSUMC under the developed modulation scheme are carried out to verify the feasibility of the proposed implementation approach on a conventional DSP.