Abstract

Microprocessors have grown tremendously in its computing and data crunching capability since the early days of the invention of a microprocessor. Today, most microprocessors in the market are at 32 bits, while the latest microprocessors from IBM, Intel and AMD are at 64 bits. To further grow the computational capability of a microprocessor, there are two possible paths. One method is to increase the data bus size of the microprocessor to 128/256/512 bits. The larger the data bus size, the more data can be crunched at any one time. The second method is to implement multiple microprocessor core in a single microprocessor unit. For example, Intel's Pentium 4 Dual Core and AMD's Athlon Dual Core both have two microprocessor core within a single microprocessor unit. Latest from Intel and AMD are quad core microprocessors with four microprocessor core within a single microprocessor unit. Both methods have its advantages and disadvantages. Both methods yields different design issues and have different engineering limitations. This research looks into the possibility of implementing a large data bus size VLIW microprocessor core of 256 bits on the data bus. VLIW is chosen as opposed to CISC and RISC due to its ease of scalability.

Highlights

  • Micro-processors and micro-controllers are widely used in the world today

  • This research looks into the possibility of implementing a large data bus size VLIW microprocessor core of 256 bits on the data bus USING VLIW MICROPROCESSOR FOR LARGE DATA BUS SIZE IMPLEMENTATION

  • Each pipe stage for all 3 parallel pipes in the microprocessor core are designed in verilog RTL and synthesized onto Altera’s EP2S180F1508I4 FPGA using Altera’s Quartus II full version 6.0 while verilog RTL simulation is done using Mentor Graphics’s Modelsim version 6.1

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Summary

Introduction

Micro-processors and micro-controllers are widely used in the world today. It is used in everyday electronic systems, be it a system used in the industries or a system used by consumers. Power consumption increases when the data bus size is doubled from 64 to 128, the increase in power consumption is lower compared to having two 64 bit microprocessor core in a single microprocessor unit. Apart from increasing the data bus size of the microprocessor, one other method to improve the data crunching power of a microprocessor is to put multiple microprocessor core within one microprocessor unit[12,13,14,20,21,22].

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