Implementation, verification and application of power hardware in-the-loop simulation for HVDC links using TLM method

Abstract

SUMMARY This paper presents details on the implementation and application of power hardware in-the-loop simulation for several physical high voltage direct current (HVDC) simulators using transmission line modeling (TLM) method. The implementation of the TLM method to the decoupled simulation of HVDC links is presented. A small test system is then used to demonstrate the feasibility of the TLM decoupling method. A real-time interface method relying on the propagation delay of transmission lines is developed and verified. Case studies presented in this paper indicate that it is possible to have interactions between the HVDC terminals in an AC system. A PHIL simulation similar to what is presented in this paper will provide an alternative to study the muti-infeed power grid. Copyright © 2012 John Wiley & Sons, Ltd.