Abstract
This paper presents architecture design and field programmable gate array (FPGA) implementation for Wideband Code Division Multiple Access (W-CDMA) transceiver system. Systems that implement the W-CDMA standard must be flexible enough to accommodate changes with the standard, as well as improvements in capacity enhancement techniques such as adaptive antenna and multi-user detection schemes. FPGAs provide this flexibility. Altera high-density, high-performance programmable logic devices (PLDs) combined with intellectual property (IP) functions and the Quartus II development software provide a complete solution for the wireless communications application. The paper describes how to implement a W-CDMA system that conforms to the IMT-2000 standard using Altera FPGAs and IP functions.
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