Implementation of UART with Status Register using Multi Bit Flip-Flop

Abstract

A UART (Universal Asynchronous Receiver and Transmitter) is a device allowing the reception and transmission of information, in a serial and asynchronous way. This project focuses on the implementation of UART with status register using multi bit flip-flop. During the reception of data, status register indicates parity error, framing error, overrun error and break error.In modern very large scale integrated circuits, Power reduction and area reduction has become a vital design goal for sophisticated design applications. Multi-bit flip-flop is an effective power saving implementation methodology by merging single bit flip-flops in the design. The underlying idea behind multi-bit flip-flop method is to eliminate total inverter number by sharing the inverters in the flip-flops. Based on the elimination feature of redundant inverters in merging single bit flip-flops into multi bit flip-flops, gives reduction of wired length and this result in reduction of power consumption and area.