Implementation of STFT for Auditory Compensation on FPGA

Abstract

AbstractIn this paper, the properties of short-time Fourier transform (STFT) and human auditory system have been exploited to design a novel approach for digital hearing aids. The filter bank approach which is currently used to design digital hearing aids has two banks of filters, analysis and synthesis filter banks. Analysis filter bank resolves the incoming signal into various sub-bands (based on frequency), appropriate gain required by the respective band is obtained beforehand from an audiometry test is applied and fed to synthesis bank where all the sub-band signals are combined to reconstruct the amplified version of the input signal. Owing to the advances in VLSI technology over the past few decades, a circuit fast enough could be designed to function as analysis filer bank, determine the dominant sub-band (for that period) and accordingly apply the gain to the real-time incoming signal, the fact that human ears process sound in quasi-stationary manner could be leveraged to compensate for the circuit delay. The discrete Fourier transform (DFT) can be used as analysis filter bank. Fast Fourier transform (FFT) is used instead of DFT as the divide and conquer approach used in the former algorithm significantly reduces the number of complex multiplications required, consequently decreasing the circuit complexity and thereby increasing the speed of the circuit. Hearing aids are required to determine spectrum of the input signal instantaneously, which is not possible with FFT since it extracts the global spectrum of the whole input signal. The local/instantaneous spectrum can be obtained by windowing the input signal over a specific time period. Additionally, “hop length” can be defined between two successive windows as duration for which the input signal is masked from the subsequent processing units since the sampling time is generally much shorter than the response time of human auditory system. By masking the inputs, subsequent circuitry is kept constant, which implies, lesser power will be consumed by the circuit. In this work, alternate frames (set of input samples equalling the length of FFT) are processed, the gain value is calculated for nth frame. The gain value obtained for nth frame is simply multiplied with the real-time input signal for the (n + 1)th frame. By simulating on Simulink, it was ensured that audio quality was not deteriorated. The Verilog code was written for the whole system and was implemented on Xilinx Artix-7.KeywordsHearing aidSTFTFPGAFFTFilterbank