Abstract
Reconfigurable embedded processors are a special class of processors comprising an extended instruction set that is implemented using a reconfigurable fabric. The instruction -set extension is typically appl ication speci fic, but i t is not required to finalize i t when designing the processor. The reconfigurable fabric consist of processing elements (PE) allows that the accelerators that are used to implement the instruction -set may be reconfigured during design time wi thout affecting the functionali ty of the working processor. This paper presents the technique to reconfigure using PE for digi tal image processing (DIP) application. We have tried to implement i t for image segmentation . Keywords-Reconfigurable Processor (RP), Reconfigurable Processing element (PE), Image segmentation, FPGA.
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