Implementation of Phasor Measurement Unit Based on Phase-Locked Loop Techniques: A Comprehensive Review

Abstract

The dynamic monitoring, control, and protection of modern power systems in real time require time-stamped electrical measurements to accurately estimate the bus voltage phasors using the state estimation function under normal and abnormal conditions. These measurements can be acquired by time-synchronized devices, known as phasor measurement units (PMUs). PMUs can measure bus voltage and branch current phasors of a three-phase network, as well as the frequency and the rate of change of frequency (ROCOF), with high speed, accuracy and time stamping provided by global positioning system (GPS) at the coordinated universal time (UTC). Various phasor estimation algorithms have been proposed in the literature, while most of them are concentrated in the discrete Fourier transform (DFT) algorithm, where an integer number of samples multiple of the nominal frequency is required for the computations. In cases where the frequency of the power grid deviates from its nominal value, the raw application of the DFT approach can lead to large errors during phasor estimation. Another approach of the phasor estimation is based on the phase-locked loop (PLL) techniques, widely used in grid tie inverters. PLL techniques can track dynamically (continuous time) the estimated frequency to the time-variant frequency of the power grid. A brief introduction to the basic concepts of the synchrophasor definition is provided, while the main DFT methods for synchrophasor estimation according to recent literature are mentioned. PLL-based PMU techniques are reviewed for both steady-state and dynamic conditions according to IEEE standards. In conclusion, the performance of PLL-based PMU algorithms presented in this literature review is discussed.